1. Field of the Invention
The present invention relates generally to optical transceiver devices, and particularly, an optical transceiver device exhibiting improved frequency and power consumption characteristics for board-level, high-bandwidth interconnects for high-end computing systems.
2. Description of the Prior Art
Interconnect bandwidth requirements within high-performance computing and switch/router systems continue to increase, driven by increasing processor speeds, more processors per system, and wider high-speed data buses. Parallel optical links between modules on the same circuit board or between boards through a backplane hold the promise of simultaneously optimizing critical interconnect parameters: data throughput, density, power consumption, and latency. Optics can also potentially support longer link lengths than electrical interconnects.
As described in L. Schares et al., “Terabus: Tb/s-class card-level optical interconnect technologies,” IEEE J. Select. Topics Quantum Electron, Special Issue on Optoelectronic Packaging, Vol. 12, No. 5, September/October 2006, there currently exists the Terabus program that aims in developing technologies for high-speed, dense, low-power inter-chip optical interconnects using printed circuit boards with integrated optical waveguides.
One current implementation of the Terabus architecture particularly incorporates 985 nm optoelectronic components (OEs), with the OE being flip-chip attached to the IC, and the ICs being “flip-chip” attached to an underlying Silicon carrier (SC). FIG. 1 illustrates the Silicon carrier performing multiple functions including: 1) a packaging platform for connecting the IC-OE assembly to an underlying printed circuit board (PCB), 2) a function for routing the high-speed inputs/outputs of the transmitters/receivers from the top of the carrier through vias to the bottom surface for connection to the host circuit board; and, 3) a function for providing an optical through hole that allow low-loss optical coupling to waveguides fabricated on an underlying printed circuit board (PCB). The actual link 10 depicted in FIG. 1, is shown in demonstrate key points including: the capability of the SC technology to connect OEs to ICs through relatively long transmission lines with relatively no or minimal impact on their high-speed operating performance; and, 2) the ability of CMOS analog front-end circuits to enable low-cost and low-power fiber-optic data interconnects.
In the architecture described in the above-mentioned L. Schares et al. reference, as shown in FIG. 1, the link 10 consists of a separate transmitter assembly 15 comprising silicon carrier (SC) 17 attached to CMOS laser diode driver (LDD) 18. An open cavity fabricated in the silicon carrier accommodates the direct attachment of a 985 nm Vertical-Cavity Surface-Emitting Laser (VCSEL) 19 to the CMOS laser diode driver (LDD). The light output of VCSEL 19 is launched into optical waveguides 20 fabricated on printed circuit board (PCB), the output of which is coupled to a photodiode (PD) 25 within a separate receiver assembly 30. The receiver assembly 30 comprises a silicon carrier (SC) 23, similar to the transmitter SC 17, however, attached to CMOS receiver IC 24, which is attached to PD 25.
In the architecture depicted in FIG. 1, the separated transmitter IC 18 and receiver IC 24 were fabricated in the IBM CMOS 8RF-LM technology, an industrial 0.13 μm process such as described in the reference to Kucharski et al. entitled “A 20 Gb/s VCSEL driver with pre-emphasis and regulated output impedance in 0.13 um CMOS,” IEEE ISSCC, pp. 222-223, February 2005. The core circuitry of both ICs occupies an area of 250 μm×350 μm. The laser diode driver (LDD) consumes 100 mW from 3.3 V (used to supply the VCSEL bias) and 2 V (used for the core circuitry) power supplies. The receiver IC consists of a TIA with a 5-stage post amplifier (PA) followed by a buffer as is fully described in the reference to C. L. Schow et al. entitled “A 15-Gb/s, 2.4-V Optical Receiver Using a Ge-on-SOI Photodiode and a CMOS IC,” IEEE Photon. Technol. Lett., in press. With a supply voltage of 2.2 V, the 3 dB bandwidth is 6.6 GHz and it consumes 70 mW at 10 Gb/s.
However, notwithstanding the efforts of the Terabus program, it would be highly desirable to provide a single-chip version of the optical interconnect that includes a single optical transceiver device capable of providing a plurality of transmitter channels and a plurality of receiver channels with each channel achieving data rates in excess of 10 Gb/s and, further, achieves extremely high area efficiency as compared with any parallel optical transmitter, receiver, or transceiver currently available.